6.16 System Interface Arbitration
Figure 6-6 Arbitration Signals for Uniprocessor System
Figure 6-7 is an example of the operation of the System interface arbitration in a uniprocessor system. The Master row in the following figures indicates which device is driving the System interface bidirectional signals (P0 and EA in
Figure 6-7). When this row contains a dash (-), as shown in Cycle 12 of Figure 6-7, mastership of the System interface is changing and no device is driving the System interface bidirectional signals for this one dead SysClk cycle.
The external agent generally asserts the SysGnt* signal, which allows the processor to issue requests at any time.
When the external agent needs to return an external data response, it negates SysGnt* for a minimum of one cycle, waits for the processor to assert SysRel*, and then begins driving the System interface bus after one dead SysClk cycle.
Figure 6-7 Arbitration Protocol for Uniprocessor System
